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[求助] STM32H750VB SPI DMA 接受异常,怀疑硬件或者HAL库的问题

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蝴蝶豆

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2019-5-15
发表于 2019-5-15 18:47:12 | 显示全部楼层 |阅读模式
本帖最后由 uu799 于 2019-5-15 18:49 编辑

最近在在H750VB移植RT-Thread最新发布的RW007 SPI WIFI,目前已经把轮训模式调通,但是由于SPI WIFI的通讯速度很高,轮训容易把CPU吃满,所以准备使用SPI DMA去处理,但是使用HAL1.4.0版本的库,使用SPI DMA的API只发送是正常的,但是一旦DMA接受就异常,SPI DMA无法再次正常通讯,相同逻辑在F4是可以正常运行。

下面是基于RTT的SPI驱动,SPI DMA区域在AXI区域不在TCM内存区域,没有开启cache。不知道有人遇到和我一样的问题吗,调试了1周无果,虚心请求解答。

  1. /*
  2. * @File:   drv_sdcard.c
  3. * @Author: liuguang
  4. * @Date:   2019-02-24 23:48:19
  5. *
  6. * @LICENSE:
  7. * The code owner is liuguang. Other personnel may
  8. * not be used or modified.
  9. *
  10. * Change Logs:
  11. * Date           Author       Notes
  12. * 2019-02-24     liuguang     The first version.
  13. */

  14. #include "drv_spi.h"
  15. #include "board.h"
  16. #include "rtdevice.h"

  17. // iperf:   
  18. #define BSP_SPI_ENABLE_DEBUG
  19. //#define BSP_SPI_USING_DMA

  20. #define DBG_ENABLE
  21. #define DBG_SECTION_NAME "drv.spi"
  22. #if defined(BSP_SPI_ENABLE_DEBUG)
  23. #define DBG_LEVEL DBG_LOG
  24. #else
  25. #define DBG_LEVEL DBG_INFO
  26. #endif
  27. #define DBG_COLOR
  28. #include <rtdbg.h>

  29. struct stm32_spi
  30. {
  31.     SPI_HandleTypeDef hspi;
  32.     struct rt_spi_configuration *cfg;

  33. #if defined(BSP_SPI_USING_DMA)
  34.     DMA_HandleTypeDef hdma_tx;
  35.     DMA_HandleTypeDef hdma_rx;
  36. #endif
  37. };
  38. typedef struct stm32_spi* stm32_spi_t;

  39. struct stm32_spi_cs
  40. {
  41.     rt_uint32_t pin;
  42. };
  43. typedef struct stm32_spi_cs* stm32_spi_cs_t;

  44. #if defined(BSP_SPI_ENABLE_PORT3)
  45. static __align(8) struct stm32_spi spi3 = {.hspi.Instance = SPI3};
  46. static __align(8) struct rt_spi_bus spi3_bus = {.parent.user_data = &spi3};
  47. #endif

  48. #if defined(BSP_SPI_ENABLE_PORT4)
  49. static __align(8) struct stm32_spi spi4 = {.hspi.Instance = SPI4};
  50. static __align(8) struct rt_spi_bus spi4_bus = {.parent.user_data = &spi4};
  51. #endif

  52. static rt_uint32_t get_spi_clk_source_freq(SPI_HandleTypeDef *hspi)
  53. {
  54.     rt_uint32_t freq = 0;

  55. #if defined(BSP_SPI_ENABLE_PORT3)
  56.     if(hspi->Instance == SPI3)
  57.     {
  58.         PLL1_ClocksTypeDef pll1 = {0};
  59.         
  60.         HAL_RCCEx_GetPLL1ClockFreq(&pll1);
  61.         freq = (rt_uint32_t)pll1.PLL1_Q_Frequency;
  62.     }
  63. #endif

  64. #if defined(BSP_SPI_ENABLE_PORT4)
  65.     if(hspi->Instance == SPI4)
  66.     {
  67.         PLL2_ClocksTypeDef pll2 = {0};
  68.         
  69.         HAL_RCCEx_GetPLL2ClockFreq(&pll2);
  70.         freq = (rt_uint32_t)pll2.PLL2_Q_Frequency;
  71.     }
  72. #endif

  73.     return freq;
  74. }

  75. static rt_err_t spi_init(stm32_spi_t spi, struct rt_spi_configuration *cfg)
  76. {
  77.     rt_uint32_t freq = 0;
  78.     rt_uint32_t divx = 0;
  79.     rt_uint32_t max_hz = 0;  
  80.     SPI_HandleTypeDef *hspi = &(spi->hspi);   

  81.     RT_ASSERT(spi != RT_NULL);
  82.     RT_ASSERT(cfg != RT_NULL);

  83.     if((cfg->data_width >= 4) && (cfg->data_width <= 32))
  84.     {
  85.         LOG_D("SPI_DATASIZE_8BIT");
  86.         hspi->Init.DataSize = SPI_DATASIZE_8BIT;
  87.     }
  88.     else
  89.     {
  90.         LOG_E("SPI data width error.");
  91.         return (-RT_EINVAL);   
  92.     }

  93.     /* 计算能配置的最接近(不高于)于目标时钟频率的分频数 */
  94.     max_hz = cfg->max_hz;  
  95.     freq = get_spi_clk_source_freq(hspi);
  96.     divx = divx;

  97.     if(max_hz >= freq/4)
  98.     {
  99.         divx = 4;
  100.         hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
  101.     }
  102.     else if(max_hz >= freq/8)
  103.     {
  104.         divx = 8;
  105.         hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
  106.     }
  107.     else if(max_hz >= freq/16)
  108.     {
  109.         divx = 16;
  110.         hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
  111.     }
  112.     else if(max_hz >= freq/32)
  113.     {
  114.         divx = 32;
  115.         hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
  116.     }
  117.     else if(max_hz >= freq/64)
  118.     {
  119.         divx = 64;
  120.         hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
  121.     }
  122.     else if(max_hz >= freq/128)
  123.     {
  124.         divx = 128;
  125.         hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
  126.     }
  127.     else
  128.     {
  129.         divx = 256;
  130.         hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
  131.     }

  132.     LOG_D("spi clk source freq is %dHz.", freq);
  133.     LOG_D("spi clk target freq is %dHz.", cfg->max_hz);
  134.     LOG_D("spi clk divx is %d.", divx);
  135.     LOG_D("spi clk freq is %dHz.", freq / divx);

  136.     /* CPOL */
  137.     if(cfg->mode & RT_SPI_CPOL)
  138.     {
  139.         LOG_D("SPI_POLARITY_HIGH");
  140.         hspi->Init.CLKPolarity = SPI_POLARITY_HIGH;
  141.     }
  142.     else
  143.     {
  144.         LOG_D("SPI_POLARITY_LOW");
  145.         hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
  146.     }

  147.     /* CPHA */
  148.     if(cfg->mode & RT_SPI_CPHA)
  149.     {
  150.         LOG_D("SPI_PHASE_2EDGE");
  151.                 hspi->Init.CLKPhase = SPI_PHASE_2EDGE;
  152.     }
  153.     else
  154.     {
  155.         LOG_D("SPI_PHASE_1EDGE");
  156.                 hspi->Init.CLKPhase = SPI_PHASE_1EDGE;
  157.     }

  158.     /* MSB or LSB */
  159.     if(cfg->mode & RT_SPI_MSB)
  160.     {
  161.         LOG_D("SPI_FIRSTBIT_MSB");
  162.         hspi->Init.FirstBit = SPI_FIRSTBIT_MSB;
  163.     }
  164.     else
  165.     {
  166.         LOG_D("SPI_FIRSTBIT_LSB");
  167.         hspi->Init.FirstBit = SPI_FIRSTBIT_LSB;
  168.     }

  169.     /* SPI3强制为3线模式3WIRE */
  170.     if(hspi->Instance == SPI3)
  171.     {
  172.         LOG_D("SPI_DIRECTION_2LINES_TXONLY");
  173.         hspi->Init.Direction = SPI_DIRECTION_2LINES_TXONLY;
  174.     }
  175.     else
  176.     {
  177.         LOG_D("SPI_DIRECTION_2LINES");
  178.         hspi->Init.Direction = SPI_DIRECTION_2LINES;
  179.     }
  180.    
  181.     /* DMA */
  182. #if defined(BSP_SPI_USING_DMA)
  183.     if(hspi->Instance == SPI4)
  184.     {
  185.         __HAL_RCC_DMA2_CLK_ENABLE();
  186.         
  187.         spi->hdma_rx.Instance                 = DMA2_Stream2;
  188.         spi->hdma_rx.Init.Request             = DMA_REQUEST_SPI4_RX;
  189.         spi->hdma_rx.Init.Direction           = DMA_PERIPH_TO_MEMORY;
  190.         spi->hdma_rx.Init.PeriphInc           = DMA_PINC_DISABLE;
  191.         spi->hdma_rx.Init.MemInc              = DMA_MINC_ENABLE;      
  192.         spi->hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  193.         spi->hdma_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
  194.         spi->hdma_rx.Init.Mode                = DMA_NORMAL;
  195.         spi->hdma_rx.Init.Priority            = DMA_PRIORITY_VERY_HIGH;
  196.         spi->hdma_rx.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;
  197.         spi->hdma_rx.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
  198.         spi->hdma_rx.Init.MemBurst            = DMA_MBURST_INC4;
  199.         spi->hdma_rx.Init.PeriphBurst         = DMA_PBURST_INC4;
  200.         
  201.         spi->hdma_tx.Instance                 = DMA2_Stream3;
  202.         spi->hdma_tx.Init.Request             = DMA_REQUEST_SPI4_TX;
  203.         spi->hdma_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
  204.         spi->hdma_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
  205.         spi->hdma_tx.Init.MemInc              = DMA_MINC_ENABLE;      
  206.         spi->hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  207.         spi->hdma_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
  208.         spi->hdma_tx.Init.Mode                = DMA_NORMAL;
  209.         spi->hdma_tx.Init.Priority            = DMA_PRIORITY_LOW;
  210.         spi->hdma_tx.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;
  211.         spi->hdma_tx.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
  212.         spi->hdma_tx.Init.MemBurst            = DMA_MBURST_INC4;
  213.         spi->hdma_tx.Init.PeriphBurst         = DMA_PBURST_INC4;

  214.         HAL_DMA_Abort(&(spi4.hdma_rx));
  215.         HAL_DMA_DeInit(&(spi->hdma_rx));
  216.         HAL_DMA_Init(&(spi->hdma_rx));
  217.         __HAL_LINKDMA(hspi, hdmatx, spi->hdma_rx);
  218.         
  219.         HAL_DMA_Abort(&(spi4.hdma_tx));
  220.         HAL_DMA_DeInit(&(spi->hdma_tx));
  221.         HAL_DMA_Init(&(spi->hdma_tx));
  222.         __HAL_LINKDMA(hspi, hdmatx, spi->hdma_tx);
  223.         
  224.         HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 1, 0);
  225.         HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
  226.         HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 1, 1);
  227.         HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);

  228.         LOG_D("spi4 dma configuration.");
  229.     }
  230. #endif

  231.     hspi->Init.Mode                       = SPI_MODE_MASTER;
  232.     hspi->Init.NSS                        = SPI_NSS_SOFT;
  233.     hspi->Init.NSSPMode                   = SPI_NSS_PULSE_DISABLE;
  234.     hspi->Init.NSSPolarity                = SPI_NSS_POLARITY_LOW;
  235.     hspi->Init.TIMode                     = SPI_TIMODE_DISABLE;
  236.     hspi->Init.CRCCalculation             = SPI_CRCCALCULATION_DISABLE;
  237.     hspi->Init.CRCPolynomial              = 7;
  238.     hspi->Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
  239.     hspi->Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
  240.     hspi->Init.MasterSSIdleness           = SPI_MASTER_SS_IDLENESS_00CYCLE;
  241.     hspi->Init.MasterInterDataIdleness    = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
  242.     hspi->Init.MasterReceiverAutoSusp     = SPI_MASTER_RX_AUTOSUSP_DISABLE;
  243.     hspi->Init.MasterKeepIOState          = SPI_MASTER_KEEP_IO_STATE_DISABLE;
  244.     hspi->Init.IOSwap                     = SPI_IO_SWAP_DISABLE;
  245.     hspi->Init.FifoThreshold              = SPI_FIFO_THRESHOLD_01DATA;
  246.    
  247.     HAL_SPI_Abort(hspi);
  248.     HAL_SPI_DeInit(hspi);
  249.     if (HAL_SPI_Init(hspi) != HAL_OK)
  250.     {
  251.         return (-RT_ERROR);
  252.     }
  253.    
  254. //    HAL_NVIC_SetPriority(SPI4_IRQn, 1, 0);
  255. //    HAL_NVIC_EnableIRQ(SPI4_IRQn);

  256.     rt_thread_mdelay(100);
  257.     LOG_D("spi configuration.");

  258.     return RT_EOK;
  259. }

  260. static rt_err_t configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
  261. {
  262.     rt_err_t ret = RT_EOK;

  263.     struct stm32_spi *spi = (struct stm32_spi *)device->bus->parent.user_data;
  264.     spi->cfg = cfg;

  265.     ret = spi_init(spi, cfg);

  266.     return ret;
  267. }

  268. static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  269. {
  270.     HAL_StatusTypeDef ret;
  271.     rt_uint32_t length = message->length;
  272.    
  273.     RT_ASSERT(device != RT_NULL);
  274.     RT_ASSERT(device->bus != RT_NULL);
  275.     RT_ASSERT(device->bus->parent.user_data != RT_NULL);

  276.     struct stm32_spi *spi = (struct stm32_spi *)device->bus->parent.user_data;
  277.     struct stm32_spi_cs *cs = device->parent.user_data;

  278.     if (message->cs_take)
  279.     {
  280.         rt_pin_write(cs->pin, PIN_LOW);
  281.     }
  282.    
  283.     if(message->length == 0)
  284.     {
  285.         length = 0;
  286.         goto _ret;
  287.     }
  288.    
  289.     if(message->send_buf == RT_NULL && message->recv_buf == RT_NULL)
  290.     {
  291.         LOG_E("send_buf and recv_buf is null.");
  292.         while(1);
  293.     }
  294.     else if(message->send_buf != RT_NULL && message->recv_buf == RT_NULL)
  295.     {
  296.     #if defined(BSP_SPI_USING_DMA)  
  297.         SCB_InvalidateDCache_by_Addr((uint32_t *)message->send_buf, message->length);
  298.         ret = HAL_SPI_Transmit_DMA(&(spi->hspi), (uint8_t *)(message->send_buf), message->length);
  299.     #else
  300.         ret = HAL_SPI_Transmit(&(spi->hspi), (uint8_t *)(message->send_buf), message->length, 1000);
  301.     #endif
  302.         if(ret != HAL_OK)
  303.         {
  304.             LOG_E("HAL_SPI_Transmit = failed.", ret);
  305.             while(1);
  306.         }
  307.     #if defined(BSP_SPI_USING_DMA)
  308.         else
  309.         {
  310.             LOG_D("HAL_SPI_Transmit = ok.");
  311.         }
  312.     #endif
  313.     }
  314.     else if(message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
  315.     {
  316.     #if defined(BSP_SPI_USING_DMA)  
  317.         SCB_InvalidateDCache_by_Addr((uint32_t *)message->recv_buf, message->length);
  318.         ret = HAL_SPI_Receive_DMA(&(spi->hspi), (uint8_t *)(message->recv_buf), message->length);
  319.     #else
  320.         ret = HAL_SPI_Receive(&(spi->hspi), (uint8_t *)(message->recv_buf), message->length, 1000);
  321.     #endif
  322.         if(ret != HAL_OK)
  323.         {
  324.             LOG_E("HAL_SPI_Receive = failed.", ret);
  325.             while(1);
  326.         }  
  327.     #if defined(BSP_SPI_USING_DMA)         
  328.         else
  329.         {
  330.             LOG_D("HAL_SPI_Receive = ok.");
  331.         }     
  332.     #endif        
  333.     }
  334.     else if(message->send_buf != RT_NULL && message->recv_buf != RT_NULL)
  335.     {
  336.     #if defined(BSP_SPI_USING_DMA)  
  337.         SCB_InvalidateDCache_by_Addr((uint32_t *)message->send_buf, message->length);
  338.         SCB_InvalidateDCache_by_Addr((uint32_t *)message->recv_buf, message->length);
  339.         ret = HAL_SPI_TransmitReceive_DMA(&(spi->hspi), (uint8_t *)(message->send_buf), (uint8_t *)(message->recv_buf), message->length);
  340.     #else
  341.         ret = HAL_SPI_TransmitReceive(&(spi->hspi), (uint8_t *)(message->send_buf), (uint8_t *)(message->recv_buf), message->length, 1000);
  342.     #endif
  343.         if(ret != HAL_OK)
  344.         {
  345.             LOG_E("HAL_SPI_TransmitReceive = failed.", ret);
  346.             while(1);
  347.         }
  348.     #if defined(BSP_SPI_USING_DMA)
  349.         else
  350.         {
  351.             LOG_D("HAL_SPI_TransmitReceive = ok.");
  352.         }
  353.     #endif
  354.     }

  355. #if defined(BSP_SPI_USING_DMA)
  356.     rt_thread_mdelay(1000);
  357. #else
  358.     while (HAL_SPI_GetState(&(spi->hspi)) != HAL_SPI_STATE_READY);
  359. #endif

  360. _ret:
  361.     if (message->cs_release)
  362.     {
  363.         rt_pin_write(cs->pin, PIN_HIGH);
  364.     }

  365.     return length;
  366. }

  367. rt_err_t stm32_spi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin)
  368. {
  369.     rt_err_t ret = RT_EOK;
  370.    
  371.     struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  372.     RT_ASSERT(spi_device != RT_NULL);

  373.     struct stm32_spi_cs *cs_pin = (struct stm32_spi_cs *)rt_malloc(sizeof(struct stm32_spi_cs));
  374.     RT_ASSERT(cs_pin != RT_NULL);

  375.     cs_pin->pin = pin;
  376.     rt_pin_mode(pin, PIN_MODE_OUTPUT);
  377.     rt_pin_write(pin, PIN_HIGH);

  378.     ret = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
  379.    
  380.     return ret;
  381. }

  382. void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
  383. {
  384.     GPIO_InitTypeDef GPIO_InitStruct = {0};
  385.    
  386.     LOG_D("HAL_SPI_MspInit");
  387.    
  388. #if defined(BSP_SPI_ENABLE_PORT3)     
  389.     if(hspi->Instance == SPI3)
  390.     {
  391.         __HAL_RCC_SPI3_CLK_ENABLE();
  392.         __HAL_RCC_GPIOC_CLK_ENABLE();

  393.         GPIO_InitStruct.Pin       = GPIO_PIN_10 | GPIO_PIN_12;
  394.         GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
  395.         GPIO_InitStruct.Pull      = GPIO_NOPULL;
  396.         GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_VERY_HIGH;
  397.         GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
  398.         HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);  
  399.     }
  400. #endif
  401.    
  402. #if defined(BSP_SPI_ENABLE_PORT4)   
  403.     if(hspi->Instance == SPI4)
  404.     {
  405.         __HAL_RCC_SPI4_CLK_ENABLE();
  406.         __HAL_RCC_GPIOE_CLK_ENABLE();

  407.         GPIO_InitStruct.Pin       = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14;
  408.         GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
  409.         GPIO_InitStruct.Pull      = GPIO_NOPULL;
  410.         GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_VERY_HIGH;
  411.         GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
  412.         HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
  413.     }
  414. #endif
  415. }

  416. void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
  417. {
  418. #if defined(BSP_SPI_ENABLE_PORT3)     
  419.     if(hspi->Instance == SPI3)
  420.     {
  421.         __HAL_RCC_SPI3_CLK_DISABLE();
  422.         HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10 | GPIO_PIN_12);  
  423.     }
  424. #endif
  425.    
  426. #if defined(BSP_SPI_ENABLE_PORT4)   
  427.     if(hspi->Instance == SPI4)
  428.     {
  429.         __HAL_RCC_SPI4_CLK_DISABLE();
  430.         HAL_GPIO_DeInit(GPIOE, GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14);  
  431.     }
  432. #endif
  433. }

  434. static struct rt_spi_ops ops = {configure, spixfer};

  435. int rt_hw_spi_init(void)
  436. {
  437. #if defined(BSP_SPI_ENABLE_PORT3)
  438.     rt_spi_bus_register(&spi3_bus, "spi3", &ops);
  439. #endif

  440. #if defined(BSP_SPI_ENABLE_PORT4)
  441.     rt_spi_bus_register(&spi4_bus, "spi4", &ops);
  442. #endif

  443.     return RT_EOK;
  444. }
  445. INIT_DEVICE_EXPORT(rt_hw_spi_init);

  446. #if defined(BSP_SPI_USING_DMA)

  447. void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
  448. {
  449. #if defined(BSP_SPI_ENABLE_PORT4)
  450.     if(hspi->Instance == SPI4)
  451.     {
  452.         LOG_I("HAL_SPI_TxRxCpltCallbacks.");
  453.     }
  454. #endif
  455. }

  456. #if defined(BSP_SPI_ENABLE_PORT4)
  457. void DMA2_Stream2_IRQHandler(void)
  458. {
  459.     HAL_DMA_IRQHandler(&(spi4.hdma_rx));
  460. }

  461. void DMA2_Stream3_IRQHandler(void)
  462. {
  463.     HAL_DMA_IRQHandler(&(spi4.hdma_tx));
  464. }

  465. void SPI4_IRQHandler(void)
  466. {
  467.     HAL_SPI_IRQHandler(&(spi4.hspi));
  468. }
  469. #endif
  470. #endif
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