【表格】STM32F103高级定时器OSSI/OSSR位与通道输出电平的关系

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zlk1214 发布时间：2017-12-26 19:14

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RM0008手册中关于CHx和CHxN通道的输出电平与OSSI、OSSR、MOE、CCxE、CCxNE等位的关系表“Table 83. Output control bits for complementary OCx and OCxN channels with
break feature”完全就是错误的！
下面是实测出来的结果：
STM32F103VE TIM1
OSSI isn't cared
OSSR isn't cared when MOE=0
0000000XX: 0    0
0000001XX: OC1REF  ~OC1REF
0000010XX: OC1REF  ~OC1REF
0000011XX: 0    0
0000100XX: OC1REF  OC1REF
0000101XX: 0    1
0000110XX: 0    1
0000111XX: OC1REF  OC1REF
0001000XX: ~OC1REF ~OC1REF
0001001XX: 1    0
0001010XX: 1    0
0001011XX: ~OC1REF ~OC1REF
0001100XX: 1    1
0001101XX: ~OC1REF OC1REF
0001110XX: ~OC1REF OC1REF
0001111XX: 1    1
0010000XX: 0    0
0010001XX: 0    1
0010010XX: 1    0
0010011XX: 0    0
0010100XX: 0    0
0010101XX: 0    1
0010110XX: 0    1
0010111XX: 1    1
0011000XX: 0    0
0011001XX: 1    0
0011010XX: 1    0
0011011XX: 1    1
0011100XX: 1    1
0011101XX: 0    1
0011110XX: 1    0
0011111XX: 1    1
0100000XX: 0    0
0100001XX: 0    1
0100010XX: 1    0
0100011XX: 0    0
0100100XX: 0    0
0100101XX: 0    1
0100110XX: 0    1
0100111XX: 1    1
0101000XX: 0    0
0101001XX: 1    0
0101010XX: 1    0
0101011XX: 1    1
0101100XX: 1    1
0101101XX: 0    1
0101110XX: 1    0
0101111XX: 1    1
0110000XX: 0    0
0110001XX: 0    1
0110010XX: 1    0
0110011XX: 0    0
0110100XX: 0    0
0110101XX: 0    1
0110110XX: 0    1
0110111XX: 1    1
0111000XX: 0    0
0111001XX: 1    0
0111010XX: 1    0
0111011XX: 1    1
0111100XX: 1    1
0111101XX: 0    1
0111110XX: 1    0
0111111XX: 1    1
10000000X: 0    0
10000001X: 0    0
10000010X: 0    0
10000011X: 0    0
10000100X: 0    0
10000101X: 0    0
10000110X: 0    0
10000111X: 0    0
10001000X: 0    0
10001001X: 0    1
10001010X: 0    0
10001011X: 0    1
10001100X: 0    0
10001101X: 0    1
10001110X: 0    0
10001111X: 0    1
10010000X: 0    0
10010001X: 1    0
10010010X: 0    0
10010011X: 1    0
10010100X: 0    0
10010101X: 1    0
10010110X: 0    0
10010111X: 1    0
10011000X: 0    0
10011001X: 1    1
10011010X: 0    0
10011011X: 1    1
10011100X: 0    0
10011101X: 1    1
10011110X: 0    0
10011111X: 1    1
10100000X: 0    OC1REF
10100001X: 0    OC1REF
10100010X: 0    OC1REF
10100011X: 0    OC1REF
10100100X: 0    OC1REF
10100101X: 0    OC1REF
10100110X: 0    OC1REF
10100111X: 0    OC1REF
10101000X: 0    ~OC1REF
10101001X: 0    ~OC1REF
10101010X: 0    ~OC1REF
10101011X: 0    ~OC1REF
10101100X: 0    ~OC1REF
10101101X: 0    ~OC1REF
10101110X: 0    ~OC1REF
10101111X: 0    ~OC1REF
10110000X: 0    OC1REF
10110001X: 1    OC1REF
10110010X: 0    OC1REF
10110011X: 1    OC1REF
10110100X: 0    OC1REF
10110101X: 1    OC1REF
10110110X: 0    OC1REF
10110111X: 1    OC1REF
10111000X: 0    ~OC1REF
10111001X: 1    ~OC1REF
10111010X: 0    ~OC1REF
10111011X: 1    ~OC1REF
10111100X: 0    ~OC1REF
10111101X: 1    ~OC1REF
10111110X: 0    ~OC1REF
10111111X: 1    ~OC1REF
11000000X: OC1REF  0
11000001X: OC1REF  0
11000010X: OC1REF  0
11000011X: OC1REF  0
11000100X: OC1REF  0
11000101X: OC1REF  0
11000110X: OC1REF  0
11000111X: OC1REF  0
11001000X: OC1REF  0
11001001X: OC1REF  1
11001010X: OC1REF  0
11001011X: OC1REF  1
11001100X: OC1REF  0
11001101X: OC1REF  1
11001110X: OC1REF  0
11001111X: OC1REF  1
11010000X: ~OC1REF 0
11010001X: ~OC1REF 0
11010010X: ~OC1REF 0
11010011X: ~OC1REF 0
11010100X: ~OC1REF 0
11010101X: ~OC1REF 0
11010110X: ~OC1REF 0
11010111X: ~OC1REF 0
11011000X: ~OC1REF 0
11011001X: ~OC1REF 1
11011010X: ~OC1REF 0
11011011X: ~OC1REF 1
11011100X: ~OC1REF 0
11011101X: ~OC1REF 1
11011110X: ~OC1REF 0
11011111X: ~OC1REF 1
11100000X: OC1REF  ~OC1REF
11100001X: OC1REF  ~OC1REF
11100010X: OC1REF  ~OC1REF
11100011X: OC1REF  ~OC1REF
11100100X: OC1REF  ~OC1REF
11100101X: OC1REF  ~OC1REF
11100110X: OC1REF  ~OC1REF
11100111X: OC1REF  ~OC1REF
11101000X: OC1REF  OC1REF
11101001X: OC1REF  OC1REF
11101010X: OC1REF  OC1REF
11101011X: OC1REF  OC1REF
11101100X: OC1REF  OC1REF
11101101X: OC1REF  OC1REF
11101110X: OC1REF  OC1REF
11101111X: OC1REF  OC1REF
11110000X: ~OC1REF ~OC1REF
11110001X: ~OC1REF ~OC1REF
11110010X: ~OC1REF ~OC1REF
11110011X: ~OC1REF ~OC1REF
11110100X: ~OC1REF ~OC1REF
11110101X: ~OC1REF ~OC1REF
11110110X: ~OC1REF ~OC1REF
11110111X: ~OC1REF ~OC1REF
11111000X: ~OC1REF OC1REF
11111001X: ~OC1REF OC1REF
11111010X: ~OC1REF OC1REF
11111011X: ~OC1REF OC1REF
11111100X: ~OC1REF OC1REF
11111101X: ~OC1REF OC1REF
11111110X: ~OC1REF OC1REF
11111111X: ~OC1REF OC1REF
从左到右依次为MOE, CC1E, CC1NE, CC1P, CC1NP, OIS1, OIS1N, OSSR, OSSI: CH1 CH1N
OC1REF表示正常输出电平, ~表示取反，X表示don't care

从表格中可以看到一个事实：OSSI位没有任何作用！
并且，当输出总开关MOE=0时，输出端也能输出PWM波形，并非一定就是输出无效态电平！

赞收藏评论2 发布时间：2017-12-26 19:14

2个回答

zlk1214 回答时间：2017-12-26 19:15:14

产生该表格所用的程序:

#include <stdio.h>
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#include <stm32f10x.h>
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#include <string.h>
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#define _BV(n) (1 << (n))( }+ T% \6 h" Z. C3 c
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/* 01序列从右到左的顺序 */
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typedef enum
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{
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OSSI, // 最右, i% t% @9 d/ M( f# u0 U3 h
OSSR,9 p) H1 g- ^6 r+ Z2 F
OIS1N,3 F9 {/ f7 b9 B
OIS1,4 ~$ h# M7 f4 e4 ]7 Y, K% h& Y
CC1NP,
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CC1P,
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CC1NE,
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CC1E,
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MOE, // 最左0 c% i' Q) V- q. \4 K5 G0 d
MAXSTATE // 代表总位数
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} StateBits;
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uint8_t states[_BV(MAXSTATE)][2][2];
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# [! P; _+ n$ w' x% u8 u* i1 o
int fputc(int ch, FILE *fp)
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if (fp == stdout)* e7 }9 i5 B$ d% p a* T" Z* i
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if (ch == '\n')
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while (USART_GetFlagStatus(UART5, USART_FLAG_TXE) == RESET);
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USART_SendData(UART5, '\r');
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while (USART_GetFlagStatus(UART5, USART_FLAG_TXE) == RESET);6 ~8 B& c4 \2 V0 I7 b
USART_SendData(UART5, ch);
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}
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return ch;
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uint8_t read_pin(GPIO_TypeDef *GPIOx, uint16_t pin), e( i! q+ d# w
{
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uint8_t value = 0;3 i3 x, B* O6 {( S2 L. S" T& H
GPIO_InitTypeDef gpio;
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gpio.GPIO_Mode = GPIO_Mode_IPU;
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gpio.GPIO_Pin = pin;& v" V7 Z4 B" ^
GPIO_Init(GPIOx, &gpio);, ]3 }, f( l. N# C2 Z2 p* C
if (GPIO_ReadInputDataBit(GPIOx, pin) == Bit_SET)
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value |= 1;) t* \ z2 q( m! l/ a; R1 Y
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gpio.GPIO_Mode = GPIO_Mode_IPD;
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GPIO_Init(GPIOx, &gpio);
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if (GPIO_ReadInputDataBit(GPIOx, pin) == Bit_SET)
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value |= 2;
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if (value == 0)
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return 0; // 两次都读到低电平0 c) m0 y/ r' Z
else if (value == 3)$ H4 U4 W* k% @2 x; S& J
return 1; // 两次都读到高电平5 e+ C. u% d3 i1 U2 [/ J
else if (value == 1)
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return 2; // 若读到的电平和使用的上拉电阻一样, 则说明是高阻态
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else
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printf("read_pin error! value=%d\n", value);
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while (1);
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void check_all(void)$ |9 l; I' c* N* |+ O: h( o
{
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uint16_t value = 0;4 Y" l& [1 t, a
TIM_BDTRInitTypeDef tim_bdtr;
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TIM_OCInitTypeDef tim_oc;5 h, U! C: l1 ~. B- [
TIM_TimeBaseInitTypeDef tim;6 k$ @6 F+ b2 C( `8 t; a+ B
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TIM_TimeBaseStructInit(&tim);
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tim.TIM_Period = 899;/ p2 o2 s( S- h9 L
tim.TIM_Prescaler = 71;; C, z2 s& r1 P s0 \
TIM_TimeBaseInit(TIM1, &tim);
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TIM_Cmd(TIM1, ENABLE);
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tim_oc.TIM_OCMode = TIM_OCMode_PWM1;) g+ D( o' S/ i% C' [* K+ E
tim_oc.TIM_Pulse = 499;
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TIM_BDTRStructInit(&tim_bdtr);/ ?# e" M5 B8 U! B/ d" }
while (value < _BV(MAXSTATE))$ Z, N% N! a& R; d+ @4 t# G5 e' K
{
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if (TIM_GetFlagStatus(TIM1, TIM_FLAG_Update) == SET)
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/* 匹配前 */' E+ f8 J. p, d- P- |& K5 g, l4 I
TIM_ClearFlag(TIM1, TIM_FLAG_Update);
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tim_bdtr.TIM_OSSIState = (value & _BV(OSSI)) ? TIM_OSSIState_Enable : TIM_OSSIState_Disable;
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tim_bdtr.TIM_OSSRState = (value & _BV(OSSR)) ? TIM_OSSRState_Enable : TIM_OSSRState_Disable;
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TIM_BDTRConfig(TIM1, &tim_bdtr);
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tim_oc.TIM_OCIdleState = (value & _BV(OIS1)) ? TIM_OCIdleState_Set : TIM_OCIdleState_Reset;8 X" h. p$ W$ d
tim_oc.TIM_OCNIdleState = (value & _BV(OIS1N)) ? TIM_OCNIdleState_Set : TIM_OCNIdleState_Reset;+ c( I7 y! g: |$ c( Q4 c" }
tim_oc.TIM_OCNPolarity = (value & _BV(CC1NP)) ? TIM_OCNPolarity_Low : TIM_OCNPolarity_High;2 k& Z2 r; p% ], s8 Z
tim_oc.TIM_OCPolarity = (value & _BV(CC1P)) ? TIM_OCPolarity_Low : TIM_OCPolarity_High;: S8 ?1 l6 K) l9 u
tim_oc.TIM_OutputNState = (value & _BV(CC1NE)) ? TIM_OutputNState_Enable : TIM_OutputNState_Disable;
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tim_oc.TIM_OutputState = (value & _BV(CC1E)) ? TIM_OutputState_Enable : TIM_OutputState_Disable;+ a# A: ?4 B6 |
TIM_OC1Init(TIM1, &tim_oc);
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TIM_CtrlPWMOutputs(TIM1, (value & _BV(MOE)) ? ENABLE : DISABLE);
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states[value][0][0] = read_pin(GPIOE, GPIO_Pin_0); // TIM1_CH1匹配前电平
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states[value][1][0] = read_pin(GPIOE, GPIO_Pin_1); // TIM1_CH1N匹配前电平; v+ S( P5 X# l4 n) {$ V
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else if (TIM_GetFlagStatus(TIM1, TIM_FLAG_CC1) == SET)
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{
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/* 匹配后 *// Y& W' o7 p+ V' W
TIM_ClearFlag(TIM1, TIM_FLAG_CC1);+ |. f# r* Y- k: @+ s
states[value][0][1] = read_pin(GPIOE, GPIO_Pin_0); // TIM1_CH1匹配后电平0 F7 ~+ k& T- {' w' ~; X
states[value][1][1] = read_pin(GPIOE, GPIO_Pin_1); // TIM1_CH1N匹配后电平
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value++;7 }6 W7 G7 m6 o
}
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}
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TIM_Cmd(TIM1, DISABLE);1 \/ A8 n) N/ h2 a% Y
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const char *value2str(uint16_t value)# x1 f) @/ x' m) T( S$ F/ U
{
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static char buf[20];4 l8 |+ [- W% ]. m) s' {& D
uint8_t i;
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uint8_t j = 0;
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uint16_t temp = value;7 b% x- A- ^6 |1 F
for (i = MAXSTATE - 1; i < MAXSTATE; i--)
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if (i == OSSI || (i == OSSR && (value & _BV(MOE)) == 0))( K3 W( L7 e! e, o4 A: Q6 N
buf[j] = 'X';3 s# o5 I% H; {3 h2 F# \. d' j
else if (temp & _BV(MAXSTATE - 1))# h; {: y' H: c3 r
buf[j] = '1';
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else
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buf[j] = '0';0 n* r( ]) ]# y% J! d
temp <<= 1;* K5 M& X. W8 o9 |: h5 h7 v4 A8 _
j++;: }" @9 }- U$ @& ]( ^
}
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buf[j] = '\0';
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return buf;
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}; }1 `9 y" b* Q! s7 T: e/ J$ f
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void print_all(void)
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uint8_t i;5 t; @8 G- ?5 S1 j; Q7 E
uint16_t value;
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// 结论1: OSSI位无意义
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for (value = 0; value < _BV(MAXSTATE); value++): C r# D2 y$ q$ R
{
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if ((value & _BV(OSSI)) == 0)% O% | d3 O6 M" k& x+ c, g
{
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if (memcmp(states[value], states[value | _BV(OSSI)], 4) != 0)! s t# P( n. ?. g' a7 W9 S5 r* ~, ]
break;
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}
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}
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if (value == _BV(MAXSTATE))+ V" q3 d3 ~7 |) U
printf("OSSI isn't cared\n");. I. N# `$ a: ^& J6 Y
else. _1 B8 g |( X$ f
{
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printf("OSSI is cared\n");
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return;4 S* ~+ T: q1 [" |( g, u" ~4 i
} S* W( Z# b, H# i3 y h# b
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// 结论2: 当MOE=0时, OSSR位无意义
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for (value = 0; value < _BV(MAXSTATE); value++)
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if ((value & _BV(MOE)) == 0)
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{
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if (memcmp(states[value], states[value | _BV(OSSR)], 4) != 0)% u& S% `! c+ D' ^
break;# ]+ i, S4 F5 q# H# |# O" T) T
}' ?4 N G# u5 U* P1 ~% \# k$ \
}) ^3 l& G6 ?3 a2 ]! S. x2 u
if (value == _BV(MAXSTATE))& A4 k* s( e" Q3 J: T$ y/ T% H
printf("OSSR isn't cared when MOE=0\n");
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else
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{
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printf("OSSR is cared when MOE=0\n"); k& v+ K) v* b3 S( Y) p8 H. U
return;" s, o; f; o: x0 w- {
}
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// 当上述结论成立时, 输出所有配置情况8 ?* Q1 o, R J& V$ F3 F
for (value = 0; value < _BV(MAXSTATE); value++)3 O4 W9 W5 i9 v: v3 j
{
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if (value & _BV(OSSI))
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continue; // 忽略OSSI=1的情况" a6 y& M7 s4 R! _" h
if ((value & _BV(MOE)) == 0 && (value & _BV(OSSR)))
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continue; // 忽略MOE=0且OSSR=1的情况: M1 Z" w' L/ p( o* _# ^
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printf("%s:", value2str(value));
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for (i = 0; i < 2; i++)& P) b, k+ I5 s* V
{
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if (states[value][i][0] == 0 && states[value][i][1] == 0)# p, c6 f4 {; W% o) A" c
printf(" 0 ");
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else if (states[value][i][0] == 0 && states[value][i][1] == 1)
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printf(" ~OC1REF");& w2 n0 g# m# ~# {. I/ D
else if (states[value][i][0] == 1 && states[value][i][1] == 0)! ]) o3 i: O1 P/ }9 K5 j
printf(" OC1REF ");
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else if (states[value][i][0] == 1 && states[value][i][1] == 1)0 N' f0 I( l) H; u1 F) E$ C
printf(" 1 ");; ^) ]4 a" N. D* z
else; p2 q5 S# u5 |; h: u: `
printf(" ?%d%d ", states[value][i][0], states[value][i][1]);8 x; u8 R( j. \( Z
}$ k: ~8 v, U- ~
printf("\n");
' [# [+ y/ q0 ~# I) A4 N
}
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}; ?, b4 M) J* b+ c5 ~9 d
" n; O0 a2 O- S! g# C8 g9 q3 }2 A4 `
int main(void)
3 S! |& J9 V. ~2 X
{
% Z% ?/ a L; ^; f
GPIO_InitTypeDef gpio;
# V0 f. l. K" J
USART_InitTypeDef usart;
# R) o+ h6 T% U2 U' @$ [
3 k, ^# u$ U) W
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);9 |! F7 l( J6 {* j& r$ \$ ?
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_TIM1, ENABLE);# ~( y/ b0 H k0 [1 e8 ]
DBGMCU_Config(DBGMCU_TIM1_STOP, ENABLE); // 调试程序时TIM1暂停计数% q7 o3 L- ^' K ]/ y
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// TIM1_CH1(PA8)接到PE0上采集
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gpio.GPIO_Mode = GPIO_Mode_AF_PP;! w8 L" r8 D& x) U% G# |% v
gpio.GPIO_Pin = GPIO_Pin_8;, i+ }! I: f& C/ b3 ]; k
gpio.GPIO_Speed = GPIO_Speed_50MHz;! c4 H a% j( n
GPIO_Init(GPIOA, &gpio);$ _' S- m: K- y- W4 m
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// TIM1_CH1N(PB13)接到PE1上采集
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gpio.GPIO_Pin = GPIO_Pin_13;' p5 Z4 B+ p' P1 ^4 J% V8 C& z1 A
GPIO_Init(GPIOB, &gpio);. N7 @ a# j0 h
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// UART5_TX(PC12)9 g/ V/ f" U' v& |/ M
gpio.GPIO_Pin = GPIO_Pin_12;. ?/ I* m8 D/ e
GPIO_Init(GPIOC, &gpio);; g' G& C: M: v
// UART5_RX(PD2)默认就是浮空输入, 无需配置2 h1 x0 F) Q( C# k0 @2 O4 L
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USART_StructInit(&usart);
% V+ D: ~# N U0 h9 h$ j
usart.USART_BaudRate = 115200;
- [$ F: K, t9 t
USART_Init(UART5, &usart);
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USART_Cmd(UART5, ENABLE);. J& j# C- M; N" B4 K% Z" @
printf("STM32F103VE TIM1\n");
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check_all();
# T, P) g$ T7 P
print_all();
# x. v; n7 T1 N
while (1);0 Z. Q' c; T8 s/ g2 h! \7 z
}